Integrated circuit packaging aims at obtaining packaging structures that are cheaper, more reliable, faster and have a higher packaging density. In the future, the integrated circuit density of various electronic devices will be improved by continuously reducing minimum feature sizes. At present, common packaging methods include Wafer Level Chip Scale Packaging (WLCSP), Fan-Out Wafer Level Package (FOWLP), Flip Chip, Package on Package (POP), and the like. With a large number of input/output (I/O) ports and good integration flexibly, the FOWLP has become one of the advanced packaging methods at present.
Increased demands for these popular high-tech electronic products have enabled more functions and applications configured into these high-tech products. In addition, to meet the need for mobilization, the function of wireless communication is provided.
In general, existing antenna structures in IC devices usually have many types, for examples, they are dipole antenna, monopole antenna, patch antenna, planar inverted-F antenna, meander line antenna, inverted-L antenna, loop antenna, spiral antenna and spring antenna. A known practice is to manufacture an antenna directly on the surface of a circuit board. By this practice, an antenna occupies an extra space of the circuit board, thereby resulting in a low integration level to the chip. For various electronic devices, a large circuit board means a large size. However, the main purpose of designing and developing these electronic devices is to allow users to carry them easily. Therefore, how to reduce the area of the circuit board occupied by an antenna, and improve the integration performance of an antenna packaging structure is the key to solve the problems of these electronic devices.
Based on the above, it is necessary to provide a packaging structure and packaging method for solving the problem caused by antenna occupying too much area of a circuit board.